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systolic-array
2022-04-02 / Last updated : 2022-08-06 admin Simulator

Running Test Programs on Gemmini Simulators

We built an environment for Chipyard, a RISC-V SoC design framework, created simulators for Gemmini, a DNN accelerator, and ran the test programs gemmini-rocc-tests.

benchmark-naxriscv-simulator
2022-03-19 / Last updated : 2022-12-10 admin Simulator

Benchmarks on RISC-V Out-of-Order Simulator

We have created a simulator for NaxRiscv, a RISC-V Out-of-Order core, and ran the benchmarks CoreMark and Dhrystone.

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