Porting PicoSoC with PicoRV32 to Sipeed Tang Primer

We have ported the PicoSoC using the PicoRV32 of 32-bit RISC-V to the Tang Primer, a low-cost FPGA board from Sipeed.
This SoC is based on github.com/cliffordwolf/picorv32.

Click here for related articles.

• Porting PicoSoC with PicoRV32 to Sipeed Tang Primer (this article)
• Testing LiteX/VexRiscv on Sipeed Tang Primer
• Running Dual-Core RISC-V Linux on Cheap FPGA Board

PicoRV32/PicoSoC

The PicoRV32 is a size-optimized open-source 32-bit RISC-V softcore.
The PicoSoC is a simple example of SoC using the PicoRV32, and the implementations of the iCE40-HX8K Breakout Board and the iCEBreaker Board are available on the above repository.

Sipeed Tang Primer

The Tang Primer is a low-cost Field-Programmable Gate Array (FPGA) board from Sipeed.
The board features Anlogic EG4S20BG256 FPGA.
It has an FPGA with Hummingbird E203 RISC-V softcore pre-loaded, and RISC-V software can be developed using the separately sold RV Debugger.
This time, we have ported the PicoRV32/PicoSoC to this board.

PicoSoC for Tang Primer

This port uses the Anlogic 32KiB ROM IP instead of the original implementation of Flash Execute-in-Place (XIP).
We have also changed the picosoc_mem to 16KiB RAM of the Anlogic IP.
Note that Flash mode control is not working, only in spi mode.

Summary

We have ported the PicoSoC using the PicoRV32 of 32-bit RISC-V to the Tang Primer, a low-cost FPGA board from Sipeed.