2023-05-27 / Last updated : 2023-05-26 admin RISC-V RISC-V Bit-Manipulation ISA-extensions In this article, we introduce the RISC-V Bit-Manipulation extension based on “RISC-V Bit-Manipulation ISA-extensions”, which was ratified in November 2021.
2022-08-06 / Last updated : 2022-09-23 admin FPGA Running ONNX Model on FPGA with Gemmini SoC We have successfully run ONNX model on an FPGA board with a DNN accelerator Gemmini and a RISC-V CPU Rocket.
2022-06-04 / Last updated : 2022-09-23 admin FPGA Running ResNet-50 on FPGA with Gemmini SoC We have successfully built a DNN system using the DNN accelerator Gemmini and the RISC-V CPU Rocket on a Digilent FPGA board and run ResNet-50.
2022-04-02 / Last updated : 2022-08-06 admin Simulator Running Test Programs on Gemmini Simulators We built an environment for Chipyard, a RISC-V SoC design framework, created simulators for Gemmini, a DNN accelerator, and ran the test programs gemmini-rocc-tests.
2022-02-19 / Last updated : 2022-12-09 admin FPGA Benchmarks in LiteX/Rocket on FPGA boards We measured a performance of the multi-core 64-bit Rocket Chip SoCs introduced in the previous article using the benchmark CoreMark.
2022-02-05 / Last updated : 2022-12-09 admin FPGA Booting RISC-V Debian in LiteX/Rocket on FPGA boards We have succeeded in configuring SoCs with 64-bit RISC-V Rocket Chip using LiteX, and booting RISC-V Debian on two FPGA boards, a Qmtech Wukong board and a Digilent Nexys Video.
2021-12-04 / Last updated : 2022-12-09 admin FPGA Running RISC-V Debian on FPGA boards using Vivado We have succeeded in configuring SoCs with 64-bit RISC-V Rocket Chip using Vivado, and running RISC-V Debian on two FPGA boards, the Qmtech Wukong board and the Digilent Nexys Video.
2021-09-11 / Last updated : 2021-10-12 admin FPGA Running 64-bit RISC-V Linux in LiteX/Rocket on Arty A7-35T We have succeeded in configuring an SoC using the LiteX/Rocket, and running 64-bit RISC-V Linux on the Arty A7-35T from Digilent. It was also successful with the Qmtech’s Wukong board.
